ScanWorks^® JTAG Buffer Board

The primary function of a JTAG buffer board is to provide a reliable interface for ScanWorks to the board or system being tested. Board designers often do not make boundary-scan one of the primary considerations during design and layout. As a result, the interface provided for the JTAG TAP signals sometimes is not implemented well. Signals may not be properly buffered or terminated, or the TCK and TMS signals may be distributed to too many devices. Furthermore, the interface to the JTAG TAP signals might consist of several scan paths when a single scan path would provide more efficient JTAG operations. Installing one of ScanWorks' buffer boards close to the UUT can alleviate many of these problems.

The Multitap Buffer Board provides an ACQ244 buffer with accessible termination resistors so they can be changed to match the impedance of the board being tested. Once the proper configuration is determined, the buffer board can be built into the UUT's test fixture. The ACQ244 supports a range of logic levels from 2.5V to 5.0V. The Multitap Buffer Board supports four sets of JTAG TAP signals. The secondary TAPs are enabled by switches on the Multitap Buffer Board or by discrete IO signals from the PCI-100 or PXI-100 boundary-scan controllers. If more than one secondary JTAG TAP is active, the active TAPs are connected serially to form one scan chain. In this way, the length of the JTAG scan path can be optimized for fast access or multiple scan paths can be combined to improve test coverage between devices on separate scan paths. The voltage provided to the Multitap Buffer board from an external power supply should be matched to the UUT logic level to be supported. Multitap Buffer boards can be cascaded together to increase the number of JTAG scan paths supported. The number of supported scan paths is limited only by the TCK propagation delay induced at each level. Usually, buffer boards eventually are designed into the test fixture for the board being tested.